DC Current Gain (h_{FE})250 to 600 (Typical Range)
Transition Frequency (f_T)100 MHz
PackageSOT-23 (TO-236AB)
Packaging3000 pieces / Tape and Reel
General description
NPN general-purpose transistors in a small SOT23 Surface-Mounted Device (SMD) plastic
package.
Features and benefits
• Three current gain selections
• High power dissipation capability
• High-temperature applications up to 175 °C
Applications
• General-purpose switching and amplification
Quick reference data
This data provides key electrical specifications for BC817K series NPN bipolar transistors. The collector-emitter voltage (VCEO) has a maximum rating of 45 V under open base conditions. The continuous collector current (IC) is limited to a maximum of 500 mA at an ambient temperature (Tamb) of 25 °C, while the peak collector current (ICM) can reach a maximum of 1 A for a single pulse with a pulse width (tp) ≤ 1 ms at Tamb=25°C. For DC current gain (hFE), measured under pulsed conditions (tp≤300μs, duty cycle δ≤0.02) with VCE=1V, IC=100mA, and Tamb=25°C, the BC817K-16H variant has a minimum gain of 100 and a maximum of 250; the BC817K-25H variant has a minimum of 160 and a maximum of 400; and the BC817K-40H variant has a minimum of 250 and a maximum of 600, with no typical values specified for any of the variants. All voltage ratings are in volts (V), current ratings in milliamps (mA) or amps (A), and current gain is a dimensionless parameter.
This section outlines the pinning configuration for the BC817K series transistor housed in the SOT23 package. As detailed in Table 3, the device features three pins, each assigned a specific identifier and functional role. Pin 1 is designated with the symbol B, corresponding to the base terminal of the transistor. Pin 2 is labeled with the symbol E, representing the emitter terminal. Pin 3 bears the symbol C, denoting the collector terminal. The simplified outline view confirms the physical layout: Pin 1 (Base) is positioned at the bottom-left, Pin 2 (Emitter) at the bottom-right, and Pin 3 (Collector) at the top-center of the SOT23 package outline. Corresponding to the physical pinout, the graphic symbol illustrates the transistor’s schematic representation with the base (B) on the left, collector (C) at the top, and emitter (E) at the bottom, clearly mapping to the three-pin SOT23 package structure.