logo
Good price  online

products details

Created with Pixso. Home Created with Pixso. Products Created with Pixso.
TI Chips
Created with Pixso.

DS36277TMX/NOPB TI Chips Dominant Mode Multipoint Transceiver

DS36277TMX/NOPB TI Chips Dominant Mode Multipoint Transceiver

Brand Name: TI Chips
Model Number: DS36277TMX/NOPB
MOQ: 2500
Packaging Details: 2500PCS/reel
Payment Terms: T/T
Detail Information
Place of Origin:
China
Document:
Model:
DS36277TMX/NOPB
Product Name:
TI Chips
Type:
SMD/SMT
Data Rate:
20 Mb/s
Encapsulation:
Reel
Operating Power Supply Voltage:
5 V
Supply Ability:
1000000
Highlight:

DS36277TMX/NOPB

,

DS36277 TI Chips

,

Dominant Mode Multipoint Transceiver

Product Description

TI Chips DS36277TMX/NOPB Dominant Mode Multipoint Transceiver


FEATURES
FAILSAFE Receiver, RO = HIGH for:
OPEN Inputs
Terminated Inputs
SHORTED Inputs
Optimal for Use in SAE J1708 Interfaces
Compatible with Popular Interface Standards:
TIA/EIA-485 and TIA/EIA-422-A
CCITT Recommendation V.11
Bi-Directional Transceiver
Designed for Multipoint Transmission
Wide Bus Common Mode Range
(−7V to +12V)
Available in PDIP and SOIC Packages


DESCRIPTION
The DS36277 Dominant Mode Multipoint Transceiver is designed for use on bi-directional differential busses. It is optimal for use on Interfaces that utilize Society of Automotive Engineers (SAE) J1708 Electrical Standard.
The device is similar to standard TIA/EIA-485 transceivers, but differs in enabling scheme. The Driver's Input is normally externally tied LOW, thus providing only two states: Active (LOW), or Disabled (OFF). When the driver is active, the dominant mode is LOW, conversely, when the driver is disabled, the bus is pulled HIGH by external bias resistors.
The receiver provides a FAILSAFE feature that ensures a known output state when the Interface is in the following conditions: Floating Line, Idle Line (no active drivers), and Line Fault Conditions (open or short). The receiver output is HIGH for the following conditions: Open Inputs, Terminated Inputs (50Ω), or Shorted Inputs. FAILSAFE is a highly desirable feature when the transceivers are used with Asynchronous Controllers such as UARTs.


Connection and Logic Diagram
DS36277TMX/NOPB TI Chips Dominant Mode Multipoint Transceiver