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STM32H723VGT6 Arm Cortex-M7 ST Chip 32-bit 550 MHz MCU Up To 1 MB Flash 564 KB RAM

STM32H723VGT6 Arm Cortex-M7 ST Chip 32-bit 550 MHz MCU Up To 1 MB Flash 564 KB RAM

Brand Name: ST IC chips
Model Number: STM32H723VGT6
MOQ: 2500PCS
Packaging Details: 2500PCS/reel
Payment Terms: T/T
Detail Information
Place of Origin:
China
Document:
Model:
STM32H723VGT6
Series:
STM32
Packaging:
Tray
Product Type:
ARM Microcontrollers - MCU
Subcategory:
Microcontrollers - MCU
Unit Weight:
681 Mg
Brand:
STMicroelectronics
Supply Ability:
10000
Highlight:

STM32H723VGT6 ST chip

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550 MHz MCU

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564 KB RAM MCU

Product Description

ST chip STM32H723VGT6 Arm® Cortex®-M7 32-bit 550 MHz MCU, up to 1 MB flash, 564 KB RAM


Arm® Cortex®-M7 32-bit 550 MHz MCU, up to 1 MB flash, 564 KB RAM, Ethernet, USB, 3x FDCAN, Graphics, 2x 16-bit ADCs

Features
Includes ST state-of-the-art patented
technology
Core
• 32-bit Arm® Cortex®-M7 CPU with DP-FPU, L1
cache: 32-Kbyte data cache and 32-Kbyte
instruction cache allowing 0-wait state
execution from embedded flash memory and
external memories, frequency up to 550 MHz,
MPU, 2778 CoreMark, and DSP instructions
Memories
• Up to 1 Mbyte of embedded flash memory with
ECC
• SRAM: total 564 Kbytes all with ECC, including
128 Kbytes of data TCM RAM for critical real
time data + 432 Kbytes of system RAM (up to
256 Kbytes can remap on instruction TCM
RAM for critical real-time instructions) +
4 Kbytes of backup SRAM (available in the
lowest-power modes)
• Flexible external memory controller with up to
16-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
• 2 x Octo-SPI interface with XiP
• 2 x SD/SDIO/MMC interface
• Bootloader
Graphics
• Chrom-ART Accelerator graphical hardware
accelerator enabling enhanced graphical user
interface to reduce CPU load
• LCD-TFT controller supporting up to XGA
resolution
STM32H723VGT6 Arm Cortex-M7 ST Chip 32-bit 550 MHz MCU Up To 1 MB Flash 564 KB RAM
Clock, reset, and supply management
• 1.62 V to 3.6 V application supply and I/O
• POR, PDR, PVD, and BOR
• Dedicated USB power
• Embedded LDO regulator
• Internal oscillators: 64 MHz HSI, 48 MHz
HSI48, 4 MHz CSI, 32 kHz LSI
• External oscillators: 4-50 MHz HSE,
32.768 kHz LSE
Low power
• Sleep, Stop, and Standby modes
• VBAT supply for RTC, 32×32-bit backup
registers
Analog
• 2×16-bit ADC, up to 3.6 MSPS in 16-bit: up to
18 channels and 7.2 MSPS in double
interleaved mode
• 1 x 12-bit ADC, up to 5 MSPS in 12-bit, up to 12
channels
• 2 x comparators
• 2 x operational amplifier GBW = 8 MHz
• 2× 12-bit D/A converters
Digital filters for sigma delta modulator
(DFSDM)
• 8 channels/4 filters
4 DMA controllers to offload the CPU 
• 2 × dual-port DMAs with FIFO
• 1 × basic DMA with request router capabilities
24 timers
• Seventeen 16-bit (including 5 x low power
16-bit timer available in stop mode) and four
32-bit timers, each with up to 4 IC/OC/PWM or
pulse counter and quadrature (incremental)
encoder input
• 2x watchdogs, 1x SysTick timer
Debug mode
• SWD and JTAG interfaces
• 2-Kbyte embedded trace buffer
Up to 114 I/O ports with interrupt
capability
Up to 35 communication interfaces
• Up to 5 × I2C Fm+ interfaces
(SMBus/PMBus™)
• Up to 6 USART/UART/LPUART (SPI, ISO7816
interface, LIN, IrDA, modem)
• Up to 6 SPIs (+ up to 5 with USART + 2 with
OCTOSPI), 4 with muxed duplex I2S for audio
class accuracy via internal audio PLL or
external clock and up to 5 x SPI (from 5 x
USART when configured in synchronous
mode)
• 2x SAI (serial audio interface)
• 1× FD/TTCAN and 2x FDCANs
• 8- to 14-bit camera interface
• 16-bit parallel slave synchronous interface
• SPDIF-IN interface
• HDMI-CEC
• Ethernet MAC interface with DMA controller
• USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip FS PHY and ULPI for external
HS PHY
• SWPMI single-wire protocol master I/F
• MDIO slave interface
Mathematical acceleration
• CORDIC for trigonometric functions
acceleration
• FMAC: Filter mathematical accelerator
Digital temperature sensor
True random number generator
CRC calculation unit
RTC with subsecond accuracy and
hardware calendar
ROP, PC-ROP, tamper detection
96-bit unique ID
All packages are ECOPACK2 compliant